Certain microelectronic packages are made using a sheet like element incorporating a dielectric layer structure and mounting terminals disposed on this structure. Some or all of the terminals are connected to the microelectronic device to be packaged. In many cases, the active microelectronic device such as a semiconductor chip is covered by an encapsulant. The encapsulant commonly is molded in place on the dielectric layer so that the mass of encapsulant has a preselected shape, and so that the encapsulant covers the microelectronic device. The encapsulant may also cover features such as wire bonds which connect the actual chip to the terminals. Such a package may be mounted on a circuit panel such as a circuit board by bonding or otherwise connecting the mounting terminals to contact pads on the circuit board.
Various proposals have been advanced for stacking plural chips one above the other in a common package. One such arrangement includes a substrate having a dielectric structure substantially larger in area than the area of a single microelectronic device or chip. Several microelectronic devices are mounted to the substrate in different parts of the substrate and the substrate is folded so that the various microelectronic devices are stacked one above the other and so that the mounting terminals on the substrate are disposed at the bottom of the stack. Typically, the substrate has electrically conductive traces extending along the dielectric structure. These traces interconnect the microelectronic devices with one another, with the mounting materials or both in the completed structure. In one such structure, the substrate is in the form of an elongated strip and the various microelectronic devices are attached at spaced apart locations along the length of the strip. The strip is then folded into a serpentine configuration so that the microelectronic devices are stacked one above the other.
If the substrate is folded in precisely the right configuration, the various microelectronic devices will be disposed in the correct locations, one above the other. The entire package can be placed in an area of the circuit board only slightly larger than the area occupied by a single microelectronic device. However, inaccuracies in folding the substrate can cause parts of the package to lie in positions different from its nominal position relative to the mounting terminals. This effectively increases the overall size of the package. Neighboring components mounted to the circuit board must be located at a larger distance from the stack so as to provide clearance sufficient to accommodate this internal misalignment within the stack. Moreover, the piece-to-piece differences between nominally identical packages caused by folding inaccuracies can complicate the task of handling and feeding the stacked packages during automated assembly operations as, for example, during mounting to the circuit panel.
As disclosed in commonly assigned U.S. Pat. No. 6,225,688, the disclosure of which is hereby incorporated by reference herein, a folding operation may be performed using a substrate having a plurality of microelectronic devices, or only a single microelectronic device, and also having additional terminals referred to herein as connection terminals. After folding, the mounting terminals of the substrate lie on the bottom of the folded structure, whereas the connection terminals lie on the top of the folded structure. Additional elements such as additional microelectronic packages can be mounted on top of the folded structure and connected to the folded structure through the connection terminals. Also, the connection terminals can be used as test terminals for testing the folded structure before or after mounting the same to a circuit panel. Inaccuracies in folding the substrate place the connection terminals at a position other than their nominal position. If an additional microelectronic element is mounted on top of the folded structure using the connection terminals, the additional microelectronic element will be displaced from its nominal position further, thus increasing the overall size of the package in the manner discussed above. Also, displacement of the connecting terminals from their nominal position can complicate the tasks of connection an additional element to the connection terminals and the task of engaging the connecting terminals with a test fixture during a testing operation.
It would be desirable to provide further improvement in substrate folding processes.